Boundary Scan

Boundary Scan (also known as JTAG) is a very fast, cost-effective way to test new products prior to launch without the need for expensive hardware/fixturing. It easily verifies that processor-based prototypes and beta test boards power up correctly. Other common test methodologies, such as flying probe, do not power up the board and

therefore Manufacturing Managers are electing to use boundary scan in conjunction or in some cases as an alternative to flying probe. Additional return on investment is realized as this application can be used as an RMA debug tool, especially when removing heatsinks is inconvenient in order to place back on a test fixture.

Boundary Scan Capabilities
Example Board with JTAG Components

Boundary Scan test architecture enables the testing of interconnects between integrated circuits on an assembly without using physical test probes. By allowing direct access to nets, Boundary Scan eliminates the need for a large number of test vectors, which are normally needed to properly initialize sequential logic. This provides shorter test times, higher test coverage, and increased diagnostic capability while lowering overall cost of test.

Boundary Scan Software Development
Chain Verification
Engineering Change Order (ECO)
Incorporate Boundary Scan into ICT & Functional Test
Local and Offshore Installations
Experience in working with boards with high node count and complexity
Boundary Scan DFT Reports

Solution Sources takes the time to provide a DFT Report with our Benchtop Boundary Scan solutions. We empower you with the ability to know what will be tested on your assembly prior to developing your application.

Verify the Scan Chain is connected properly (including Buffers and BYPASS resistor Stuffing per customer supplied BOM)
Verify Compliance Pins (Pins to be tied HIGH or LOW) are configured properly
List of TAP Controller and Power resources needed
Test Coverage Summary
Suggestions for Test Coverage improvement
Features OverviewItems Needed to QuoteRequest a QuoteAdditional Resources
Features Overview
Fast Program Development
No Need for Test Fixtures
Quick Diagnostics
Program Flash Devices
CPLD config data implementation
Device Level Diagnostics
Checks Opens & Shorts
Allows Component Discovery & Identification
Finds Flash Communication Problems
Identifies Timing Problems
Items Needed to Quote
CAD Data (Ex. .cad, .brd, .odb++, .pcb, .zip)
Bill of Materials (in Excel Format)
Schematics (.pdf format)
Fab & Assembly Drawings (optional)
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Additional Resources
DFT Report Sample [Sample]
DFT Guidelines [Document]